InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers

Integration of III–V semiconductors on Si substrates allows for the realization of high-performance, low power III–V electronics on the Si-platform. In this work, we demonstrate the implementation of single balanced down-conversion mixer circuits, fabricated using vertically aligned InAs nanowire devices on Si. A thin, highly doped InAs buffer layer has been introduced to reduce the access resistance and serve as a bottom electrode. Low-frequency voltage conversion gain is measured up to 7 dB for a supply voltage of 1.5V. Operation of these mixers extends into the GHz regime with a ##IMG## [http://ift.tt/1w96dGJ] {$-3\;{\rm dB}$} cut-off frequency of 2 GHz, limited by the optical lithography system used. The circuit dc power consumption is measured at 3.9 mW.

Martin Berg, Karl-Magnus Persson, Jun Wu, Erik Lind, Henrik Sjöland and Lars-Erik Wernersson

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