Wednesday, May 07, 2014

Fabrication of sub-20 nm Nanopore Arrays in Membranes with Embedded Metal Electrodes at Wafer Scales

Nanoscale , 2014, Accepted Manuscript

DOI: 10.1039/C3NR06723H, Paper

deqiang wang, jingwei bai, Sung-wook Nam, Hongbo Peng, Robert Bruce, Lynn Gignac, Markus Brink, Ernst Kratschmer, Stephen Rossnagel, Philip S. Waggoner, Kathy Reuter, Chao Wang, Yann Astier, Venkat Balagurusamy, Binquan Luan, Young Kwark, Eric Joseph, Michael Guillorn, stas Polonsky, Ajay Royyuru, Satyavolu Papa Rao, Gustavo A Stolovitzky

We introduce a method to fabricate solid-state nanopores at sub-20 nm diameter in membranes with embedded metal electrodes across a 200 mm wafer with CMOS compatible semiconductor processes. Multi-layer (metal-dielectric)...

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